HIP6021CB-T【PDF 6/15 页】IC REG QD BCK/LINEAR 28-SOIC

6

Functional Pin Descriptions

VCC (Pin 28)

Provide a 12V bias supply for the IC to this pin. This pin also

provides the gate bias charge for all the MOSFETs

controlled by the IC. The voltage at this pin is monitored for

Power-On Reset (POR) purposes.

GND (Pin 17)

Signal ground for the IC. All voltage levels are measured with

respect to this pin.

PGND (Pin 24)

This is the power ground connection. Tie the synchronous

PWM converters lower MOSFET source to this pin.

VAUX (Pin 16)

This pin provides boost current for the linear regulators

output drives in the event bipolar NPN transistors (instead

of N-channel MOSFETs) are employed as pass elements.

The voltage at this pin is monitored for power-on reset

(POR) purposes.

SS (Pin 12)

Connect a capacitor from this pin to ground. This capacitor,

along with an internal 28礎 current source, sets the

soft-start interval of the converter.

FAULT / RT (Pin 13)

This pin provides oscillator switching frequency adjustment.

By placing a resistor (R

T

) from this pin to GND, the nominal

200kHz switching frequency is increased according to the

following equation:

Conversely, connecting a resistor from this pin to VCC

reduces the switching frequency according to the following

equation:

Nominally, the voltage at this pin is 1.26V. In the event of an

over-voltage or over-current condition, this pin is internally

pulled to VCC.

PGOOD (Pin 8)

PGOOD is an open collector output used to indicate the

status of the output voltages. This pin is pulled low when the

synchronous regulator output is not within ?0% of the

DACOUT reference voltage or when any of the other outputs

are below their under-voltage thresholds.

The PGOOD output is open for 11111 VID code.

SD (Pin 9)

This pin shuts down all the outputs. A TTL-compatible, logic

level high signal applied at this pin immediately discharges

the soft-start capacitor, disabling all the outputs. Dedicated

internal circuitry insures the core output voltage does not go

negative during this process. When re-enabled, the IC

undergoes a new soft-start cycle. Left open, this pin is pulled

low by an internal pull-down resistor, enabling operation.

FIX (Pin 2)

Grounding this pin bypasses the internal resistor dividers

that set the output voltage of the 1.5V and 1.8V linear

regulators. This way, the output voltage of the two regulators

can be adjusted from 1.26V up to the input voltage (+3.3V or

+5V) by way of an external resistor divider connected at the

corresponding VSEN pin. The new output voltage set by the

external resistor divider can be determined using the

following formula:

where R

OUT

is the resistor connected from VSEN to the

output of the regulator, and R

GND

is the resistor connected

from VSEN to ground. Left open, the FIX pin is pulled high,

enabling fixed output voltage operation.

VID0, VID1, VID2, VID3, VID4 (Pins 7, 6, 5, 4 and 3)

VID0-4 are the TTL-compatible input pins to the 5-bit DAC.

The logic states of these five pins program the internal

voltage reference (DACOUT). The level of DACOUT sets the

microprocessor core converter output voltage, as well as the

coresponding PGOOD and OVP thresholds.

OCSET (Pin 23)

Connect a resistor from this pin to the drain of the respective

upper MOSFET. This resistor, an internal 200礎 current

source, and the upper MOSFETs on-resistance set the

converter over-current trip point. An over-current trip cycles

the soft-start function.

The voltage at this pin is monitored for power-on reset (POR)

purposes and pulling this pin low with an open drain device

will shutdown the IC.

PHASE (Pin 26)

Connect the PHASE pin to the PWM converters upper

UGATE (Pin 27)

Connect UGATE pin to the PWM converters upper MOSFET

gate. This pin provides the gate drive for the upper MOSFET.

LGATE (Pin 25)

Connect LGATE to the PWM converters lower MOSFET

gate. This pin provides the gate drive for the lower MOSFET.

COMP and FB (Pin 20, and 21)

COMP and FB are the available external pins of the PWM

converter error amplifier. The FB pin is the inverting input of the

Fs 200KHz

5 10

6

?/DIV>

R

T

k&

( )

-------------------- -

+

H

(R

T

to GND)

Fs 200KHz

4 10

7

?/DIV>

R

T

k&

( )

-------------------- -

H

(R

T

to 12V)

V

OUT

1.265V 1

R

OUT

R

GND

---------------- -

+

?/DIV>

=

HIP6021

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

我的联系方式

*

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式